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LTM4627 15A DC/DC Module Regulator FEATURES
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DESCRIPTION
The LTM(R)4627 is a complete 15A output high efficiency switch mode DC/DC power supply. Included in the package are the switching controller, power FETs, inductor and compensation components. Operating over an input voltage range from 4.5V to 20V, the LTM4627 supports an output voltage range of 0.6V to 5V, set by a single external resistor. Only a few input and output capacitors are needed. Current mode operation allows precision current sharing of up to four LTM4627 regulators to obtain 60A output. High switching frequency and a current mode architecture enable a very fast transient response to line and load changes without sacrificing stability. The device supports frequency synchronization, multiphase/current sharing operation, Burst Mode operation and output voltage tracking for supply rail sequencing. The LTM4627 is offered in a thermally enhanced 15mm x 15mm x 4.32mm LGA package. The LTM4627 is PB-free and RoHS compliant.
L, LT, LTC, LTM, Linear Technology, the Linear logo, Burst Mode and Module are registered trademarks of Linear Technology Corporation. PolyPhase is a registered trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents, including 5481178, 5847554, 6580258, 6304066, 6476589, 6774611, 6677210.
Complete 15A Switch Mode Power Supply Wide Input Voltage Range: 4.5V to 20V 0.6V to 5V Output Range 1.5% Total DC Output Error (-40C to 125C) Differential Remote Sense Amplifier for Precision Regulation Current Mode Control/ Fast Transient Response Frequency Synchronization Parallel Current Sharing (Up to 60A) Selectable Pulse-Skipping or Burst Mode(R) Operation Soft-Start/Voltage Tracking Up to 93% Efficiency (12VIN, 3.3VOUT) Overcurrent Foldback Protection Output Overvoltage Protection Small Surface Mount Footprint, Low Profile 15mm x 15mm x 4.32mm LGA Package
APPLICATIONS
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Telecom Servers and Networking Equipment ATCA and Storage Cards Industrial Equipment Medical Systems
TYPICAL APPLICATION
1.2V, 15A DC/DC Module(R) Regulator
VIN 4.5V TO 16V 95 22F 16V x3 90 150pF 10k 0.1F VIN COMP TRACK/SS RUN fSET 100k MODE_PLLIN SGND * SEE TABLE 4 ** SEE TABLE 1 GND LTM4627 EXTVCC INTVCC PGOOD VOUT VOUT_LCL DIFF_OUT VOSNS+ VOSNS- VFB RFB** 60.4k
4627 TA01a
Efficiency vs Load Current
85 EFFICIENCY (%) VOUT 1.2V 15A 100F* 6.3V 80 75 70 65 60 55 50 0 2 4 12VIN, 1.2VOUT 5VIN, 1.2VOUT 6 10 12 8 LOAD CURRENT (A) 14 16
+
82pF
470F 6.3V
4627 TA01b
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LTM4627 ABSOLUTE MAXIMUM RATINGS
(Note 1)
PIN CONFIGURATION
VIN TOP VIEW MODE_PLLIN INTVCC TRACK/SS
4 5 6 7 8 9 10 11
VIN ............................................................. -0.3V to 22V INTVCC, VOUT (VOUT 3.3V with DIFF AMP), VOUT_LCL, PGOOD, EXTVCC ....... -0.3V to 6V MODE_PLLIN, fSET, TRACK/SS, VOSNS -, VOSNS+, DIFF_OUT...................-0.3V to INTVCC COMP, VFB ................................................ -0.3V to 2.7V RUN (Note 5) ............................................... -0.3V to 5V INTVCC Peak Output Current (Note 6) ..................100mA Internal Operating Temperature Range (Note 2).................................................. -40C to 125C Storage Temperature Range .................. -55C to 125C Reflow (Peak Body) Temperature .......................... 250C
COMP
12
1 A
2
3
VIN
B C D E F
RUN fSET INTVCC EXTVCC PGOOD VFB PGOOD SGND VOSNS+ DIFF_OUT VOUT_LCL VOSNS- VOUT LGA PACKAGE 133-LEAD (15mm 15mm 4.32mm)
GND
G H J K L M
VOUT
TJ(MAX) = 125C, JA = 13C/W, JCbottom = 2.3C/W, JCtop = 11C/W to 13C/W, JA DERIVED FROM 95mm x 76mm PCB WITH 4 LAYERS; WEIGHT = 2.6g VALUES DETERMINED PER JESD51-12
ORDER INFORMATION
LEAD FREE FINISH LTM4627EV#PBF LTM4627IV#PBF TRAY LTM4627EV#PBF LTM4627IV#PBF PART MARKING* LTM4627V LTM4627V PACKAGE DESCRIPTION 133-Lead (15mm x 15mm x 4.32mm) LGA 133-Lead (15mm x 15mm x 4.32mm) LGA TEMPERATURE RANGE -40C to 125C -40C to 125C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ This product is only offered in trays. For more information go to: http://www.linear.com/packaging/
ELECTRICAL CHARACTERISTICS
SYMBOL VIN VOUT(DC) PARAMETER Input DC Voltage Output Voltage, Total Variation with Line and Load CONDITIONS
The l denotes the specifications which apply over the full internal operating temperature range, otherwise specifications are at TA = 25C (Note 2), VIN = 12V, per the typical application in Figure 18.
MIN
l
TYP 1.50
MAX 20 1.523
UNITS V V
4.5 1.477
CIN = 22F x 3 COUT = 100F Ceramic, 470F POSCAP RFB = 40.2k, MODE_PLLIN = GND VIN = 5V to 20V, IOUT = 0A to 15A (Note 4) VRUN Rising
l
Input Specifications VRUN VRUNHYS RUN Pin On Threshold RUN Pin On Hysteresis 1.1 1.25 130 1.4 V mV
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LTM4627 ELECTRICAL CHARACTERISTICS
SYMBOL IQ(VIN) PARAMETER Input Supply Bias Current CONDITIONS VIN = 12V, VOUT = 1.5V, Burst Mode Operation, IOUT = 0.1A VIN = 12V, VOUT = 1.5V, Pulse-Skipping Mode, IOUT = 0.1A VIN = 12V, VOUT = 1.5V, Switching Continuous, IOUT = 0.1A Shutdown, RUN = 0, VIN = 12V VIN = 5V, VOUT = 1.5V, IOUT = 15A VIN = 12V, VOUT = 1.5V, IOUT = 15A VIN = 12V, VOUT = 1.5V (Note 4) VOUT = 1.5V, VIN from 4.5V to 20V IOUT = 0A VOUT = 1.5V, IOUT = 0A to 15A, VIN = 12V (Note 4) IOUT = 0A, COUT = 100F Ceramic, 470F POSCAP VIN = 12V, VOUT = 1.5V COUT = 100F Ceramic, 470F POSCAP , VOUT = 1.5V, IOUT = 0A, VIN = 12V COUT = 100F Ceramic, 470F POSCAP , No Load, TRACK/SS = 0.001F VIN = 12V , Load: 0% to 50% to 0% of Full Load COUT = 100F Ceramic, 470F POSCAP , VIN = 12V, VOUT = 1.5V Load: 0% to 50% to 0% of Full Load VIN = 5V, COUT = 100F Ceramic, 470F POSCAP VIN = 12V, VOUT = 1.5V VIN = 5V, VOUT = 1.5V IOUT = 0A, VOUT = 1.5V (Note 7)
l l l l
The l denotes the specifications which apply over the full internal operating temperature range, otherwise specifications are at TA = 25C (Note 2), VIN = 12V, per the typical application in Figure 18.
MIN TYP 17 25 54 40 5.05 2.13 0 0.02 0.2 15 20 50 60 15 0.06 0.45 MAX UNITS mA mA mA A A A A %/V % mVP-P mV ms mV
IS(VIN)
Input Supply Current
Output Specifications IOUT(DC) VOUT (Line) VOUT VOUT (Load) VOUT VOUT(AC) VOUT(START) tSTART VOUTLS Output Continuous Current Range Line Regulation Accuracy Load Regulation Accuracy Output Ripple Voltage Turn-On Overshoot Turn-On Time Peak Deviation for Dynamic Load Settling Time for Dynamic Load Step Output Current Limit
tSETTLE IOUTPK Control Section VFB IFB VOVL ITRACK/SS tON(MIN) RFBHI VOSNS+, VOSNS- CM RANGE VDIFF_OUT(MAX) VOS AV SR GBP CMRR IDIFF_OUT
20 25 25 0.594 0.65 1.0 0.60 -12 0.67 1.2 90 60.05 60.40 60.75 4 0.606 -25 0.69 1.4
s A A V nA V A ns k V V 2 mV V/V V/s MHz dB mA
Voltage at VFB Pin Current at VFB Pin Feedback Overvoltage Lockout Track Pin Soft-Start Pull-Up Current Minimum On-Time Resistor Between VOUT_LCL and VFB Pins Common Mode Input Range
TRACK/SS = 0V (Note 3)
VIN = 12V, Run > 1.4V
0 INTVCC - 1.4 1 2 3
Maximum DIFF_OUT Voltage IDIFF_OUT = 300A Input Offset Voltage Differential Gain Slew Rate Gain Bandwidth Product Common Mode Rejection DIFF_OUT Current (Note 7) Sourcing VOSNS+ = VDIFF_OUT = 1.5V, IDIFF_OUT = 100A
60 2
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LTM4627 ELECTRICAL CHARACTERISTICS
SYMBOL PSRR RIN VPGOOD PARAMETER Power Supply Rejection Ratio Input Resistance PGOOD Trip Level CONDITIONS 5V < VIN < 20V (Note 7) VOSNS+ to GND VFB With Respect to Set Output VFB Ramping Negative VFB Ramping Positive IPGOOD = 2mA 6V < VIN < 20V ICC = 0 to 50mA EXTVCC Ramping Positive ICC = 25mA, VEXTVCC = 5V 250 VfSET = 1.2V VfSET = 1V VfSET 2.4V 450 350 700 9 500 400 770 10 250 2.0 0.8 maximum ambient temperature consistent with these specifications is determined by specific operating conditions in conjunction with board layout, the rated package thermal resistance and other environmental factors. Note 3: The minimum on-time condition is specified for a peak-to-peak inductor ripple current of ~40% of IMAX Load. (See the Applications Information section) Note 4: See output current derating curves for different VIN, VOUT and TA. Note 5: Limit current into the RUN pin to less than 2mA. Note 6: Guaranteed by design. Note 7: 100% tested at wafer level.
l
The l denotes the specifications which apply over the full internal operating temperature range, otherwise specifications are at TA = 25C (Note 2), VIN = 12V, per the typical application in Figure 18.
MIN TYP 100 80 -10 10 0.1 4.8 4.5 5 0.5 4.7 50 100 800 550 450 850 11 0.3 5.2 MAX UNITS dB k % % V V % V mV kHz kHz kHz kHz A k V V
VPGL VINTVCC VEXTVCC VLDO Ext fSYNC Frequency Nominal Frequency Low Frequency High IFREQ RMODE_PLLIN VIH_MODE_PLLIN VIL_MODE_PLLIN
PGOOD Voltage Low Internal VCC Voltage External VCC Switchover EXTVCC Voltage Drop SYNC Capture Range Nominal Frequency Lowest Frequency Highest Frequency Frequency Set Current Mode_PLLIN Input Resistance Clock Input Level High Clock Input Level Low
INTVCC Linear Regulator VINTVCC Load Reg INTVCC Load Regulation
Oscillator and Phase-Locked Loop
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTM4627 is tested under pulsed load conditions such that TJ TA. The LTM4627E is guaranteed to meet performance specifications over the 0C to 125C internal operating temperature range. Specifications over the full -40C to 125C internal operating temperature range are assured by design, characterization and correlation with statistical process controls. The LTM4627I is guaranteed to meet specifications over the full -40C to 125C internal operating temperature range. Note that the
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LTM4627 TYPICAL PERFORMANCE CHARACTERISTICS
Efficiency vs Load Current with 5VIN
100 95 90 EFFICIENCY (%) EFFICIENCY (%) 85 80 75 70 65 60 55 50 0 2 4 6 10 12 8 LOAD CURRENT (A) 1VOUT AT 400kHz 1.2VOUT AT 400kHz 1.5VOUT AT 400kHz 2.5VOUT AT 400kHz 3.3VOUT AT 650kHz 14 16 100 95 90 EFFICIENCY (%) 85 80 75 70 65 60 55 50 0 2 4 1VOUT AT 400kHz 1.2VOUT AT 400kHz 1.5VOUT AT 400kHz 2.5VOUT AT 500kHz 3.3VOUT AT 600kHz 5VOUT AT 600kHz 6 10 12 8 LOAD CURRENT (A) 14 16
Efficiency vs Load Current with 8VIN
100 95 90 85 80 75 70 65 60 55 50
Efficiency vs Load Current with 12VIN
1VOUT AT 400kHz 1.2VOUT AT 400kHz 1.5VOUT AT 400kHz 2.5VOUT AT 650kHz 3.3VOUT AT 650kHz 5VOUT AT 700kHz 0 2 4 6 10 12 8 LOAD CURRENT (A) 14 16
4627 G01
4627 G02
4627 G03
Burst Mode Efficiency
1.0 0.9 EFFICIENCY (%) 0.8 12VIN, 2.5VOUT Burst Mode OPERATION 0.7 0.6 0.5 0.4 5VIN, 2.5VOUT Burst Mode OPERATION 1.0 0.9 EFFICIENCY (%) 0.8 0.7 0.6 0.5 0.4
Pulse-Skipping Mode Efficiency
5VIN, 2.5VOUT PULSE-SKIPPING MODE 50mV/DIV
1.0V Transient Response
7.5A LOAD STEP 12VIN, 2.5VOUT PULSE-SKIPPING MODE 100s/DIV
4627 G06
VIN = 12V, VOUT = 1.0V, CFF = 82pF, CCOMP = 33pF OUTPUT CAPACITOR = 5 100F CERAMIC X5R 0.1 0.2 1 0.5 1.5 LOAD CURRENT (A) 2
4627 G05
0.1
0.2
1 0.5 1.5 LOAD CURRENT (A)
2
4627 G04
1.2V Transient Response
1.5V Transient Response
1.8V Transient Response
50mV/DIV
50mV/DIV
50mV/DIV
7.5A LOAD STEP 100s/DIV
4627 G07
7.5A LOAD STEP 100s/DIV
4627 G08
7.5A LOAD STEP 100s/DIV
4627 G09
VIN = 12V, VOUT = 1.2V, CFF = 82pF, CCOMP = 33pF OUTPUT CAPACITOR = 5 100F CERAMIC X5R
VIN = 12V, VOUT = 1.5V, CFF = 82pF, CCOMP = 33pF OUTPUT CAPACITOR = 5 100F CERAMIC X5R
VIN = 12V, VOUT = 1.8V, CFF = 82pF, CCOMP = 33pF OUTPUT CAPACITOR = 4 100F CERAMIC X5R
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LTM4627 TYPICAL PERFORMANCE CHARACTERISTICS
2.5V Transient Response 3.3V Transient Response 5.0V Transient Response
50mV/DIV
50mV/DIV
50mV/DIV
7.5A LOAD STEP 100s/DIV
4627 G10
7.5A LOAD STEP 100s/DIV
4627 G11
7.5A LOAD STEP 100s/DIV
4627 G12
VIN = 12V, VOUT = 2.5V, CFF = 82pF, CCOMP = 33pF OUTPUT CAPACITOR = 4 100F CERAMIC X5R
VIN = 12V, VOUT = 3.3V, CFF = 82pF, CCOMP = 33pF OUTPUT CAPACITOR = 2 100F CERAMIC X5R
VIN = 12V, VOUT = 5V, CFF = 82pF, CCOMP = 33pF OUTPUT CAPACITOR = 2 100F CERAMIC X5R
Start-Up with Soft-Start
VOUT VOUT 500mV/DIV
Short-Circuit Protection No Load
VOUT 500mV/DIV IIN
Short-Circuit Protection 15A Load
500mV/DIV
IOUT
5A/DIV IIN 100s/DIV
4627 G13
1A/DIV
1A/DIV
4ms/DIV VIN = 12V, VOUT = 1.5V, IOUT = 0A
4627 G14
4ms/DIV VIN = 12V, VOUT = 1.5V, IOUT = 15A
4627 G15
VIN = 12V, VOUT = 1.5V, IOUT = 15A INPUT CAP 150F SANYO ELECTROLYTIC CAP AND 22F 2 X5R CERAMIC CAP OUTPUT CAP 1 100F X5R CERAMIC AND 470F 0.1F CAP FROM TRACK/SS TO GND
PIN FUNCTIONS
VIN (A1-A6, B1-B6, C1-C6): Power Input Pins. Apply input voltage between these pins and GND pins. Recommend placing input decoupling capacitance directly between VIN pins and GND pins. VOUT (J1-J10, K1-K11, L1-L11, M1-M11): Power Output Pins. Apply output load between these pins and GND pins. Recommend placing output decoupling capacitance directly between these pins and GND pins. Review Table 4. GND (B7, B9, C7, C9, D1-D6, D8, E1-E7, E9, F1-F9, G1-G9, H1-H9): Power Ground Pins for Both Input and Output Returns.
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PGOOD (F11, G12): Output Voltage Power Good Indicator. Open-drain logic output that is pulled to ground when the output voltage exceeds a 10% regulation window. Both pins are tied together internally. SGND (G11, H11, H12): Signal Ground Pin. Return ground path for all analog and low power circuitry. Tie a single connection to the output capacitor GND in the application. See layout guidelines in Figure 17.
6
LTM4627 PIN FUNCTIONS
MODE_PLLIN (A8): Forced Continuous Mode, Burst Mode Operation, or Pulse-Skipping Mode Selection Pin and External Synchronization Input to Phase Detector Pin. Connect this pin to INTVCC to enable pulse-skipping mode of operation. Connect to ground to enable forced continuous mode of operation. Floating this pin will enable Burst Mode operation. A clock on this pin will enable synchronization with forced continuous operation. See the Applications Information section. fSET (B12): A resistor can be applied from this pin to ground to set the operating frequency, or a DC voltage can be applied to set the frequency. See the Applications Information section. TRACK/SS (A9): Output Voltage Tracking Pin and SoftStart Inputs. The pin has a 1.2A pull-up current source. A capacitor from this pin to ground will set a soft-start ramp rate. In tracking, the regulator output can be tracked to a different voltage. The different voltage is applied to a voltage divider then the slave output's track pin. This voltage divider is equal to the slave output's feedback divider for coincidental tracking. See the Applications Information section. VFB (F12): The Negative Input of the Error Amplifier. Internally, this pin is connected to VOUT_LCL with a 60.4k precision resistor. Different output voltages can be programmed with an additional resistor between VFB and ground pins. In PolyPhase(R) operation, tying the VFB pins together allows for parallel operation. See the Applications Information section for details. COMP (A11): Current Control Threshold and Error Amplifier Compensation Point. The current comparator threshold increases with this control voltage. Tie all COMP pins together for parallel operation. The device is internally compensated. RUN: (A10) Run Control Pin. A voltage above 1.4V will turn on the module. A 5.1V Zener diode to ground is internal to the module for limiting the voltage on the RUN pin to 5V, and allowing a pull-up resistor to VIN for enabling the device. Limit current into the RUN pin to 2mA. INTVCC: (A7, D9) Internal 5V LDO for Driving the Control Circuitry and the Power MOSFET Drivers. Both pins are internally connected. The 5V LDO has a 100mA current limit. EXTVCC (E12): External power input to an internal control switch allows an external source greater than 4.7V, but less than 6V to supply IC power and bypass the internal INTVCC LDO. See the Applications Information section. VOUT_LCL: (L12) This pin connects to VOUT through a 1M resistor, and to VFB with a 60.4k resistor. The remote sense amplifier output DIFF_OUT is connected to VOUT_LCL, and drives the 60.4k top feedback resistor in remote sensing applications. When the remote sense amplifier is used, DIFF_OUT effectively eliminates the 1M from VOUT to VOUT_LCL. When the remote sense amplifier is not used, then connect VOUT_LCL to VOUT directly. VOSNS+: (J12) (+) Input to the Remote Sense Amplifier. This pin connects to the output remote sense point. The remote sense amplifier is used for VOUT 3.3V. VOSNS-: (M12) (-) Input to the Remote Sense Amplifier. This pin connects to the ground remote sense point. The remote sense amplifier is used for VOUT 3.3V. DIFF_OUT: (K12) Output of the Remote Sense Amplifier. This pin connects to the VOUT_LCL pin for remote sense applications. Otherwise float when not used. MTP1, MTP2, MTP3, MTP4, MTP5, MTP6, MTP7, MTP8 (A12, B11, C10, C11, C12, D10, D11, D12): Extra mounting pads used for increased solder integrity strength. Leave floating.
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LTM4627 BLOCK DIAGRAM
INTVCC VOUT_LCL VIN R1 > 1.4V = ON < 1.1V = OFF MAX = 5V 1M VOUT PGOOD 10k
RUN 5.1V COMP 60.4k INTERNAL COMP SGND VFB fSET POWER CONTROL 10F M2 M1 0.4H 1.5F
VIN
+
VIN 4.5V TO 20V CIN
R2
VOUT COUT
+
VOUT 1V 15A
90.9k
GND RfSET 100k INTERNAL LOOP FILTER INTVCC VOSNS-
C SOFT-START
TRACK/SS
250k INTVCC C
DIFF AMP
EXTVCC
Figure 1. Simplified LTM4627 Block Diagram
DECOUPLING REQUIREMENTS
SYMBOL CIN PARAMETER External Input Capacitor Requirement (VIN = 4.5V to 20V, VOUT = 1.5V) External Output Capacitor Requirement (VIN = 4.5V to 20V, VOUT = 1.5V)
TA = 25C. Use Figure 1 configuration.
MIN 66 TYP MAX UNITS F
CONDITIONS IOUT = 15A
COUT
IOUT = 15A
8
- +
-
+
MODE_PLLIN
VOSNS+
DIFF_OUT
4627 F01
200
F
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LTM4627 OPERATION
Power Module Description The LTM4627 is a high performance single output standalone nonisolated switching mode DC/DC power supply. It can provide a 15A output with few external input and output capacitors. This module provides precisely regulated output voltages programmable via external resistors from 0.6VDC to 5VDC over a 4.5V to 20V input range. The typical application schematic is shown in Figure 18. The LTM4627 has an integrated constant-frequency current mode regulator, power MOSFETs, 0.4H inductor, and other supporting discrete components. The switching frequency range is from 400kHz to 800kHz, and the typical operating frequency is 500kHz. For switching noise-sensitive applications, it can be externally synchronized from 400kHz to 800kHz. A single resistor is used to program the frequency. See the Applications Information section. With current mode control and internal feedback loop compensation, the LTM4627 module has sufficient stability margins and good transient performance with a wide range of output capacitors, even with all ceramic output capacitors. Current mode control provides cycle-by-cycle fast current limit in an overcurrent condition. An internal overvoltage monitor protects the output voltage in the event of an overvoltage >10%. The top MOSFET is turned off and the bottom MOSFET is turned on until the output is cleared. Pulling the RUN pin below 1.1V forces the regulator into a shutdown state. The TRACK/SS pin is used for programming the output voltage ramp and voltage tracking during start-up. See the Application Information section. The LTM4627 is internally compensated to be stable over all operating conditions. Table 4 provides a guideline for input and output capacitances for several operating conditions. The Linear Technology Module Power Design Tool will be provided for transient and stability analysis. The VFB pin is used to program the output voltage with a single external resistor to ground. A remote sense amplifier is provided for accurately sensing output voltages 3.3V at the load point. Multiphase operation can be easily employed with the synchronization inputs using an external clock source. See application examples. High efficiency at light loads can be accomplished with selectable Burst Mode operation using the MODE_PLLIN pin. These light load features will accommodate battery operation. Efficiency graphs are provided for light load operation in the Typical Performance Characteristics section.
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LTM4627 APPLICATIONS INFORMATION
The typical LTM4627 application circuit is shown in Figure 18. External component selection is primarily determined by the maximum load current and output voltage. Refer to Table 4 for specific external capacitor requirements for particular applications. VIN to VOUT Step-Down Ratios There are restrictions in the VIN to VOUT step-down ratio that can be achieved for a given input voltage. The VIN to VOUT minimum dropout is a function of load current and at very low input voltage and high duty cycle applications output power may be limited as the internal top power MOSFET is not rated for 15A operation at higher ambient temperatures. At very low duty cycles the minimum 90ns on-time must be maintained. See the Frequency Adjustment section and temperature derating curves. Output Voltage Programming The PWM controller has an internal 0.6V 1% reference voltage. As shown in the Block Diagram, a 60.4k internal feedback resistor connects the VOUT_LCL and VFB pins together. When the remote sense amplifier is used, then DIFF_OUT is connected to the VOUT_LCL pin. If the remote sense amplifier is not used, then VOUT_LCL connects to VOUT. The output voltage will default to 0.6V with no feedback resistor. Adding a resistor RFB from VFB to ground programs the output voltage: VOUT = 0.6V * 60.4k + RFB RFB
1.2 60.4 1.5 40.2 1.8 30.1 2.5 19.1 3.3 13.3 5.0 8.25
For parallel operation of N LTM4627s, the following equation can be used to solve for RFB: 60.4 / N RFB = VOUT -1 0.6 Tie the VFB pins together for each parallel output. The COMP pins must be tied together also. Input Capacitors The LTM4627 module should be connected to a low AC-impedance DC source. Additional input capacitors are needed for the RMS input ripple current rating. The ICIN(RMS) equation which follows can be used to calculate the input capacitor requirement. Typically 22F X7R ceramics are a good choice with RMS ripple current ratings of ~ 2A each. A 47F to 100F surface mount aluminum electrolytic bulk capacitor can be used for more input bulk capacitance. This bulk input capacitor is only needed if the input source impedance is compromised by long inductive leads, traces or not enough source capacitance. If low impedance power planes are used, then this bulk capacitor is not needed. For a buck converter, the switching duty cycle can be estimated as: D= VOUT VIN
Table 1. VFB Resistor Table vs Various Output Voltages
VOUT (V) RFB (k) 0.6 Open 1.0 90.9
Without considering the inductor ripple current, for each output, the RMS current of the input capacitor can be estimated as: IOUT(MAX) I CIN(RMS)= * D * (1- D) % In the previous equation, % is the estimated efficiency of the power module. The bulk capacitor can be a switcher-rated electrolytic aluminum capacitor or a Polymer capacitor.
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LTM4627 APPLICATIONS INFORMATION
Output Capacitors The LTM4627 is designed for low output voltage ripple noise. The bulk output capacitors defined as COUT are chosen with low enough effective series resistance (ESR) to meet the output voltage ripple and transient requirements. COUT can be a low ESR tantalum capacitor, low ESR Polymer capacitor or ceramic capacitors. The typical output capacitance range is from 200F to 800F Additional output . filtering may be required by the system designer if further reduction of output ripple or dynamic transient spikes is required. Table 4 shows a matrix of different output voltages and output capacitors to minimize the voltage droop and overshoot during a 7A/s transient. The table optimizes total equivalent ESR and total bulk capacitance to optimize the transient performance. Stability criteria are considered in the Table 4 matrix, and the Linear Technology Module Power Design Tool will be provided for stability analysis. Multiphase operation will reduce effective output ripple as a function of the number of phases. Application Note 77 discusses this noise reduction versus output ripple current cancellation, but the output capacitance should be considered carefully as a function of stability and transient response. The Linear Technology Module Power Design Tool can calculate the output ripple reduction as the number of implemented phase's increases by N times. Burst Mode Operation The LTM4627 is capable of Burst Mode operation in which the power MOSFETs operate intermittently based on load demand, thus saving quiescent current. For applications where maximizing the efficiency at very light loads is a high priority, Burst Mode operation should be applied. To enable Burst Mode operation, simply float the MODE_PLLIN pin. During Burst Mode operation, the peak current of the inductor is set to approximately 30% of the maximum peak current value in normal operation even though the voltage at the COMP pin indicates a lower value. The voltage at the COMP pin drops when the inductor's average current is greater than the load requirement. As the COMP voltage drops below 0.5V, the burst comparator trips, causing the internal sleep line to go high and turn off both power MOSFETs. In sleep mode, the internal circuitry is partially turned off, reducing the quiescent current. The load current is now being supplied from the output capacitors. When the output voltage drops, causing COMP to rise, the internal sleep line goes low, and the LTM4627 resumes normal operation. The next oscillator cycle will turn on the top power MOSFET and the switching cycle repeats. Pulse-Skipping Mode Operation In applications where low output ripple and high efficiency at intermediate currents are desired, pulse-skipping mode should be used. Pulse-skipping operation allows the LTM4627 to skip cycles at low output loads, thus increasing efficiency by reducing switching loss. Tying the MODE_PLLIN pin to INTVCC enables pulse-skipping operation. With pulse-skipping mode at light load, the internal current comparator may remain tripped for several cycles, thus skipping operation cycles. This mode has lower ripple than Burst Mode operation and maintains a higher frequency operation than Burst Mode operation. Forced Continuous Operation In applications where fixed frequency operation is more critical than low current efficiency, and where the lowest output ripple is desired, forced continuous operation should be used. Forced continuous operation can be enabled by tying the MODE_PLLIN pin to ground. In this mode, inductor current is allowed to reverse during low output loads, the COMP voltage is in control of the current comparator threshold throughout, and the top MOSFET always turns on with each oscillator pulse. During start-up, forced continuous mode is disabled and inductor current is prevented from reversing until the LTM4627's output voltage is in regulation.
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LTM4627 APPLICATIONS INFORMATION
Multiphase Operation For outputs that demand more than 15A of load current, multiple LTM4627 devices can be paralleled to provide more output current without increasing input and output voltage ripple. The MODE_PLLIN pin allows the LTM4627 to be synchronized to an external clock (between 400kHz to 800kHz) and the internal phase-locked loop allows the LTM4627 to lock onto input clock phase as well. The fSET resistor is selected for normal frequency, then the incoming clock can synchronize the device over the specified range. See Figure 20 for a synchronizing example circuit. A multiphase power supply significantly reduces the amount of ripple current in both the input and output capacitors. The RMS input ripple current is reduced by, and the effective ripple frequency is multiplied by, the number of phases used (assuming that the input voltage is greater than the number of phases used times the output voltage). The output ripple amplitude is also reduced by the number of phases used. See Application Note 77. The LTM4627 device is an inherently current mode controlled device, so parallel modules will have good current sharing. This will balance the thermals in the design. Tie the COMP and VFB pins of each LTM4627 together to share the current evenly. Figure 20 shows a schematic of the parallel design. Input RMS Ripple Current Cancellation Application Note 77 provides a detailed explanation of multiphase operation. The input RMS ripple current cancellation mathematical derivations are presented, and a graph is displayed representing the RMS ripple current reduction as a function of the number of interleaved phases (see Figure 2). PLL, Frequency Adjustment and Synchronization The LTM4627 switching frequency is set by a resistor (RfSET) from the fSET pin to signal ground. A 10A current (IFREQ) flowing out of the fSET pin through RfSET develops a voltage on fSET. RfSET can be calculated as: RfSET (k) = FREQ(kHz) + 2kHz 4.5
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The relationship of fSET voltage to switching frequency is shown in Figure 3. For low output voltages from 0.8V to 1.5V, 400kHz operation is an optimal frequency for the best power conversion efficiency while maintaining the inductor current to about 30% to 40% of maximum load current. For output voltages from 1.8V to 3.0V, 500kHz to 600kHz is optimal. For output voltages from 3.0V to 5.0V, 750kHz operation is optimal, but due to the higher ripple current at 5V operation the output current is limited to 10A. The LTM4627 can be synchronized from 400kHz to 800kHz with an input clock that has a high level above 2V and a low level below 0.8V. The 400kHz low end operation limit is put in place to limit inductor ripple current. See the Typical Applications section for synchronization examples. The LTM4627 minimum on-time is limited to approximately 90ns. Guardband the on-time to 130ns. The on-time can be calculated as: t ON(MIN)= 1 V OUT * FREQ VIN
Output Voltage Tracking Output voltage tracking can be programmed externally using the TRACK/SS pin. The output can be tracked up and down with another regulator. The master regulator's output is divided down with an external resistor divider that is the same as the slave regulator's feedback divider to implement coincident tracking. The LTM4627 uses an accurate 60.4k resistor internally for the top feedback resistor. Figure 4 shows an example of coincident tracking. 60.4k VOUT(SLAVE) = 1+ * V TRACK R TA VTRACK is the track ramp applied to the slave's track pin. VTRACK has a control range of 0V to 0.6V, or the internal reference voltage. When the master's output is divided down with the same resistor values used to set the slave's output, then the slave will coincident track with the master until it reaches its final value. The master will continue to
12
LTM4627 APPLICATIONS INFORMATION
0.60 0.55 0.50 0.45 RMS INPUT RIPPLE CURRENT DC LOAD CURRENT 0.40 0.35 0.30 0.25 0.20 0.15 0.10 0.05 0 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9 DUTY FACTOR (VOUT/VIN)
4627 F02
1 PHASE 2 PHASE 3 PHASE 4 PHASE 6 PHASE
Figure 2. Normalized Input RMS Ripple Current vs Duty Factor for One to Six Module Regulators (Phases)
900 800 SWITCHING FREQUENCY (kHz) 700 600 500 400 300 200 100 0 0 0.5 1 1.5 fSET PIN VOLTAGE (V) 2 2.5
4627 F03
Figure 3. Relationship Between Switching Frequency and Voltage at the fSET Pin
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LTM4627 APPLICATIONS INFORMATION
its final value from the slave's regulation point. Voltage tracking is disabled when VTRACK is more than 0.6V. RTA in Figure 4 will be equal to the RFB for coincident tracking. The TRACK/SS pin of the master can be controlled by an external ramp or the soft-start function of that regulator can be used to develop that master ramp. The LTM4627 can be used as a master by setting the ramp rate on its track pin using a soft-start capacitor. A 1.2A current source is used to charge the soft-start capacitor. The following equation can be used: C t SOFT-START = 0.6 * SS 1.2A Ratiometric tracking can be achieved by a few simple calculations and the slew rate value applied to the master's TRACK/SS pin. As mentioned above, the TRACK/SS pin has a control range from 0V to 0.6V. The master's TRACK/SS pin slew rate is directly equal to the master's output slew rate in volts/time. The equation: MR * 60.4k = R TB SR where MR is the master's output slew rate and SR is the slave's output slew rate in volts/time. When coincident tracking is desired, then MR and SR are equal, thus RTB is equal to 60.4k. RTA is derived from equation: R TA = 0.6V V V FB V + FB - TRACK 60.4k RFB R TB
where VFB is the feedback voltage reference of the regulator, and VTRACK is 0.6V. Since RTB is equal to the 60.4k
VIN 6V TO 16V
C7 22F 16V
C9 22F 16V
C10 22F 16V R2 10k
SOFT-START CAPACITOR CSS
150pF
VIN COMP
EXTVCC INTVCC PGOOD VOUT LTM4627 VOUT_LCL DIFF_OUT VOSNS+ VOSNS- GND VFB RFB1 40.2k 82pF
TRACK/SS RUN fSET R4 100k
+
VOUT2 1.5V AT 15A C8 470F 6.3V C11 100F 6.3V
MODE_PLLIN SGND
VIN 6V TO 16V
C3 22F 16V
C1 22F 16V
C2 22F 16V R1 10k
MASTER RAMP OR OUTPUT 150pF RTA 60.4k RTB 60.4k
VIN COMP
EXTVCC INTVCC PGOOD VOUT LTM4627 VOUT_LCL DIFF_OUT VOSNS+ VOSNS- GND VFB RFB 60.4k
4627 F04
TRACK/SS RUN fSET R3 100k
+
82pF
C4 470F 6.3V
C6 100F 6.3V
VOUT1 1.2V 15A
MODE_PLLIN SGND
Figure 4. Dual Outputs (1.5V and 1.2V) with Tracking
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LTM4627 APPLICATIONS INFORMATION
top feedback resistor of the slave regulator in equal slew rate or coincident tracking, then RTA is equal to RFB with VFB = VTRACK. Therefore RTB = 60.4k, and RTA = 60.4k in Figure 4. In ratiometric tracking, a different slew rate maybe desired for the slave regulator. RTB can be solved for when SR is slower than MR. Make sure that the slave supply slew rate is chosen to be fast enough so that the slave output voltage will reach its final value before the master output. For example, MR = 1.5V/ms, and SR = 1.2V/ms. Then RTB = 75k. Solve for RTA to equal 51.1k. For applications that do not require tracking or sequencing, simply tie the TRACK/SS pin to INTVCC to let RUN control the turn on/off. When the RUN pin is below its threshold or the VIN undervoltage lockout, then TRACK/SS is pulled low.
MASTER OUTPUT
electronic circuit breaker or fuse can be sized to be tripped or cleared when the bottom MOSFET is turned on to protect against the overvoltage. Foldback current limiting is disabled during soft-start or tracking start-up. Run Enable The RUN pin is used to enable the power module or sequence the power module. The threshold is 1.25V, and the pin has an internal 5.1V Zener to protect the pin. The RUN pin can be used as an undervoltage lockout (UVLO) function by connecting a resistor divider from the input supply to the RUN pin: VUVLO = ((R1+R2)/R2) * 1.25V. See the Block Diagram for the example of use. INTVCC Regulator The LTM4627 has an internal low dropout regulator from VIN called INTVCC. This regulator output has a 4.7F ceramic capacitor internal. This regulator powers the internal controller and MOSFET drivers. The gate driver current is ~20mA for 750kHz operation. The regulator loss can be calculated as: (VIN - 5V) * 20mA = PLOSS EXTVCC external voltage source 4.7V can be applied to this pin to eliminate the internal INTVCC LDO power loss and increase regulator efficiency. A 5V supply can be applied to run the internal circuitry and power MOSFET driver. If unused, leave pin floating. Stability Compensation The module has already been internally compensated for all output voltages. Table 4 is provided for most application requirements. The Linear Technology Module Power Design Tool will be provided for other control loop optimization.
OUTPUT VOLTAGE
SLAVE OUTPUT
TIME
4627 F05
Figure 5. Output Voltage Coincident Tracking
Overcurrent and Overvoltage Protection The LTM4627 has overcurrent protection (OCP) in a short circuit. The internal current comparator threshold folds back during a short to reduce the output current. An overvoltage condition (OVP) above 10% of the regulated output voltage will force the top MOSFET off and the bottom MOSFET on until the condition is cleared. An input
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LTM4627 APPLICATIONS INFORMATION
Thermal Considerations and Output Current Derating The thermal resistances reported in the Pin Configuration section of the data sheet are consistent with those parameters defined by JESD51-9 and are intended for use with finite element analysis (FEA) software modeling tools that leverage the outcome of thermal modeling, simulation, and correlation to hardware evaluation performed on a Module package mounted to a hardware test board--also defined by JESD51-9 ("Test Boards for Area Array Surface Mount Package Thermal Measurements"). The motivation for providing these thermal coefficients in found in JESD 51-12 ("Guidelines for Reporting and Using Electronic Package Thermal Information"). Many designers may opt to use laboratory equipment and a test vehicle such as the demo board to anticipate the Module regulator's thermal performance in their application at various electrical and environmental operating conditions to compliment any FEA activities. Without FEA software, the thermal resistances reported in the Pin Configuration section are in-and-of themselves not relevant to providing guidance of thermal performance; instead, the derating curves provided in the data sheet can be used in a manner that yields insight and guidance pertaining to one's application-usage, and can be adapted to correlate thermal performance to one's own application. The Pin Configuration section typically gives four thermal coefficients explicitly defined in JESD 51-12; these coefficients are quoted or paraphrased below: 1 JA, the thermal resistance from junction to ambient, is the natural convection junction-to-ambient air thermal resistance measured in a one cubic foot sealed enclosure. This environment is sometimes referred to as "still air" although natural convection causes the air to move. This value is determined with the part mounted to a JESD 51-9 defined test board, which does not reflect an actual application or viable operating condition. 2 JCbottom, the thermal resistance from junction to the bottom of the product case, is the junction-to-board thermal resistance with all of the component power dissipation flowing through the bottom of the package. In the typical Module, the bulk of the heat flows out the bottom of the package, but there is always heat flow out into the ambient environment. As a result, this thermal resistance value may be useful for comparing packages but the test conditions don't generally match the user's application. 3 JCtop, the thermal resistance from junction to top of the product case, is determined with nearly all of the component power dissipation flowing through the top of the package. As the electrical connections of the typical Module are on the bottom of the package, it is rare for an application to operate such that most of the heat flows from the junction to the top of the part. As in the case of JCbottom, this value may be useful for comparing packages but the test conditions don't generally match the user's application. 4 JB, the thermal resistance from junction to the printed circuit board, is the junction-to-board thermal resistance where almost all of the heat flows through the bottom of the Module and into the board, and is really the sum of the JCbottom and the thermal resistance of the bottom of the part through the solder joints and through a portion of the board. The board temperature is measured a specified distance from the package, using a two sided, two layer board. This board is described in JESD 51-9. A graphical representation of the aforementioned thermal resistances is given in Figure 6; blue resistances are contained within the Module regulator, whereas green resistances are external to the Module. As a practical matter, it should be clear to the reader that no individual or sub-group of the four thermal resistance parameters defined by JESD 51-12 or provided in the Pin Configuration section replicates or conveys normal operating conditions of a Module. For example, in normal board-mounted applications, never does 100% of the device's total power loss (heat) thermally conduct exclusively through the top or exclusively through bottom of the Module--as the standard defines for JCtop and JCbottom, respectively. In practice, power loss is thermally dissipated in both directions away from the package--granted, in the absence of a heat sink and airflow, a majority of the heat flow is into the board. Within a SIP (system-in-package) module, be aware there are multiple power devices and components dissipating power, with a consequence that the thermal resistances
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LTM4627 APPLICATIONS INFORMATION
JUNCTION-TO-AMBIENT RESISTANCE (JESD 51-9 DEFINED BOARD) JUNCTION-TO-CASE (TOP) RESISTANCE CASE (TOP)-TO-AMBIENT RESISTANCE
JUNCTION
JUNCTION-TO-BOARD RESISTANCE JUNCTION-TO-CASE CASE (BOTTOM)-TO-BOARD (BOTTOM) RESISTANCE RESISTANCE BOARD-TO-AMBIENT RESISTANCE
At
80421 F05
MODULE DEVICE
Figure 6. Graphical Representation of JESD 51-12 Thermal Coefficients
relative to different junctions of components or die are not exactly linear with respect to total package power loss. To reconcile this complication without sacrificing modeling simplicity--but also, not ignoring practical realities--an approach has been taken using FEA software modeling along with laboratory testing in a controlled-environment chamber to reasonably define and correlate the thermal resistance values supplied in this data sheet: (1) Initially, FEA software is used to accurately build the mechanical geometry of the Module and the specified PCB with all of the correct material coefficients along with accurate power loss source definitions; (2) this model simulates a software-defined JEDEC environment consistent with JSED51-9 to predict power loss heat flow and temperature readings at different interfaces that enable the calculation of the JEDEC-defined thermal resistance values; (3) the model and FEA software is used to evaluate the Module with heat sink and airflow; (4) having solved for and analyzed these thermal resistance values and simulated various operating conditions in the software model, a thorough laboratory evaluation replicates the simulated conditions with thermocouples within a controlled-environment chamber while operating the device at the same power loss as that which was simulated. An outcome of this process and due-diligence yields a set of derating curves provided in other sections of this data sheet. After these laboratory test have been performed and correlated to the Module model, then the JB and BA are summed together to correlate quite well with the Module model with no airflow or heat sinking in a properly define chamber. This
JB + BA value is shown in the Pin Configuration section and should accurately equal the JA value because approximately 100% of power loss flows from the junction through the board into ambient with no airflow or top mounted heat sink. The 1.2V and 3.3V power loss curves in Figures 7 and 8 can be used in coordination with the load current derating curves in Figures 9 to 16 for calculating an approximate JA thermal resistance for the LTM4627 with various heat sinking and airflow conditions. The power loss curves are taken at room temperature, and are increased with multiplicative factors according to the ambient temperature. These approximate factors are: 1 for 40C; 1.05 for 50C; 1.1 for 60C; 1.15 for 70C; 1.2 for 80C; 1.25 for 90C; 1.3 for 100C; 1.35 for 110C and 1.4 for 120C. The derating curves are plotted with the output current starting at 15A and the ambient temperature at 40C. The output voltages are 1.2V, and 3.3V. These are chosen to include the lower and higher output voltage ranges for correlating the thermal resistance. Thermal models are derived from several temperature measurements in a controlled temperature chamber along with thermal modeling analysis. The junction temperatures are monitored while ambient temperature is increased with and without airflow. The power loss increase with ambient temperature change is factored into the derating curves. The junctions are maintained at 120C maximum while lowering output current or power with increasing ambient temperature. The decreased output current will decrease the inter4627f
17
LTM4627 APPLICATIONS INFORMATION
nal module loss as ambient temperature is increased. The monitored junction temperature of 120C minus the ambient operating temperature specifies how much module temperature rise can be allowed. As an example in Figure 11 the load current is derated to ~12A at ~80C with no air or heat sink and the power loss for the 12V to 1.2V at 12A output is about 2.8W. The 2.8W loss is calculated with the ~2.35W room temperature loss from the 12V to 1.2V power loss curve at 12A, and the 1.2 multiplying factor at 80C ambient. If the 80C ambient temperature is subtracted from the 120C junction temperature, then the difference of 40C divided by 2.8W equals a 14C/W JA thermal resistance. Table 2 specifies a 13C/W value which is very close. Table 2 and Table 3 provide equivalent
3.0 2.5 POWER LOSS (W) 2.0 1.5 1.0 0.5 0
thermal resistances for 1.2V and 3.3V outputs with and without airflow and heat sinking. The derived thermal resistances in Tables 2 and 3 for the various conditions can be multiplied by the calculated power loss as a function of ambient temperature to derive temperature rise above ambient, thus maximum junction temperature. Room temperature power loss can be derived from the efficiency curves in the Typical Performance Characteristics section and adjusted with the above ambient temperature multiplicative factors. The printed circuit board is a 1.6mm thick four layer board with two ounce copper for the two outer layers and one ounce copper for the two inner layers. The PCB dimensions are 95mm x 76mm. The BGA heat sinks are listed in Table 4.
6 5 POWER LOSS (W) 4 3 2 1 0 5VIN TO 3.3VOUT POWER LOSS 12VIN TO 3.3VOUT POWER LOSS
5VIN TO 1.2VOUT POWER LOSS 12VIN TO 1.2VOUT POWER LOSS
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 OUTPUT CURRENT (A)
4627 F07
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 OUTPUT CURRENT (A)
4627 F08
Figure 7. 1.2VOUT Power Loss
16 14 OUTPUT CURRENT (A) OUTPUT CURRENT (A) 12 10 8 6 4 2 16 14 12 10 8 6 4 2 0
Figure 8. 3.3VOUT Power Loss
0 LFM 200 LFM 400 LFM 40 50 60 70 80 90 100 110 120 130
4627 F09
0 LFM 200 LFM 400 LFM 40 50 60 70 80 90 100 110 120 130
4627 F10
0
AMBIENT TEMPERATURE (C)
AMBIENT TEMPERATURE (C)
Figure 9. 5VIN to 1.2VOUT No Heat Sink
Figure 10. 5VIN to 1.2VOUT with Heat Sink
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LTM4627 APPLICATIONS INFORMATION
16 14 OUTPUT CURRENT (A) OUTPUT CURRENT (A) 12 10 8 6 4 2 0 40 50 0 LFM 200 LFM 400 LFM 60 70 80 90 100 110 120 130
4627 F10
16 14 12 10 8 6 4 2 0 40 50 0 LFM 200 LFM 400 LFM 60 70 80 90 100 110 120 130
4627 F12
AMBIENT TEMPERATURE (C)
AMBIENT TEMPERATURE (C)
Figure 11. 12VIN to 1.2VOUT No Heat Sink
Figure 12. 12VIN to 1.2VOUT with Heat Sink
14 12 OUTPUT CURRENT (A) 10 8 6 4 2 0 40 0 LFM 200 LFM 400 LFM 50 60 70 80 90 100 110 120 130
4627 F13
14 12 OUTPUT CURRENT (A) 10 8 6 4 2 0 40 0 LFM 200 LFM 400 LFM 50 60 70 80 90 100 110 120 130
4627 F14
AMBIENT TEMPERATURE (C)
AMBIENT TEMPERATURE (C)
Figure 13. 5VIN to 3.3VOUT No Heat Sink
Figure 14. 5VIN to 3.3VOUT with Heat Sink
16 14 OUTPUT CURRENT (A) OUTPUT CURRENT (A) 0 LFM 200 LFM 400 LFM 40 50 60 70 80 90 100 110 120 130
4627 F15
16 14 12 10 8 6 4 2 0 40 50 0 LFM 200 LFM 400 LFM 60 70 80 90 100 110 120 130
4627 F16
12 10 8 6 4 2 0
AMBIENT TEMPERATURE (C)
AMBIENT TEMPERATURE (C)
Figure 15. 12VIN to 3.3VOUT No Heat Sink
Figure 16. 12VIN to 3.3VOUT with Heat Sink
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LTM4627 APPLICATIONS INFORMATION
Table 2. 1.2V Output
DERATING CURVE Figures 9, 11 Figures 9, 11 Figures 9, 11 Figures 10, 12 Figures 10, 12 Figures 10, 12 VIN 5V, 12V 5V, 12V 5V, 12V 5V, 12V 5V, 12V 5V, 12V POWER LOSS CURVE Figure 7 Figure 7 Figure 7 Figure 7 Figure 7 Figure 7 AIRFLOW (LFM) 0 200 400 0 200 400 HEAT SINK None None None BGA Heat Sink BGA Heat Sink BGA Heat Sink JA (C/W) 13 11 8 12 8 7
Table 3. 3.3V Output
DERATING CURVE Figures 13, 15 Figures 13, 15 Figures 13, 15 Figures 14, 16 Figures 14, 16 Figures 14, 16 VIN 5V, 12V 5V, 12V 5V, 12V 5V, 12V 5V, 12V 5V, 12V POWER LOSS CURVE Figure 8 Figure 8 Figure 8 Figure 8 Figure 8 Figure 8 AIRFLOW (LFM) 0 200 400 0 200 400 HEAT SINK None None None BGA Heat Sink BGA Heat Sink BGA Heat Sink JA (C/W) 13 11 8 12 8 7
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LTM4627 APPLICATIONS INFORMATION
Table 4. Output Voltage Response vs Component Matrix (Refer to Figure 18) 0A to 7.5A Load Step
COUT1 AND COUT2 CERAMIC VENDOR TDK Murata VALUE 22F 6.3V 22F 16V PART NUMBER C3216X7SOJ226M GRM31CR61C226KE15L COUT1 AND COUT2 BULK VENDOR Sanyo POSCAP Sanyo POSCAP Sanyo POSCAP Sanyo POSCAP
VALUE 1000F 2.5V 470F 2.5V 470F 6.3V
PART NUMBER 2R5TPD1000M5 2R5TPD470M5 6TPD470M
CIN BULK VENDOR Sanyo
VALUE 56F 25V
PART NUMBER 25SVP56M
TDK Murata
100F 6.3V 100F 6.3V
C4532X5ROJ107MZ GRM32ER60J107M
VOUT CIN COUT1 (CERAMIC) AND CIN (V) (CERAMIC) (BULK)** COUT2 (CER AND BULK) 1 1 1 1.2 1.2 1.2 1.2 1.5 1.5 1.5 1.5 1.8 1.8 1.8 2.5 2.5 3.3 3.3 5 5 22F x 3 22F x 3 22F x 3 22F x 3 22F x 3 22F x 3 22F x 3 22F x 3 22F x 3 22F x 3 22F x 3 22F x 3 22F x 3 22F x 3 22F x 3 22F x 3 22F x 3 22F x 3 22F x 3 22F x 3 56F 56F 56F 56F 56F 56F 56F 56F 56F 56F 56F 56F 56F 56F 56F 56F 56F 56F 56F 56F 100F x 2, 1000F 100F x 2, 470F x 2 100F x 4 100F x 2, 1000F 100F 470F , 100F x 2, 470F x 2 100F x 4 100F x 2, 1000F 100F 470F , 100F x 2, 470F x 2 100F x 3 100F x 2, 1000F 100F 470F , 100F x 2 100F x 2 100F 470F , 100F x 2 100F 470F , 100F x 2 470F
CFF (pF) 68 82 82 82 82 82 82 82 82 82 82 68 82 82 82 82 82 82 68 47
CCOMP (pF) 150 150 33 150 150 150 33 150 47 150 33 150 150 none none 150 none 150 none 150
VIN (V) 5,12 5,12 5,12 5,12 5,12 5,12 5,12 5,12 5,12 5,12 5,12 5,12 5,12 5,12 5,12 5,12 5,12 5,12 12 12
PEAK TO PEAK DROOP DEVIATION (mV) (mV) 50 50 52 40 60 40 50 60 67 60 65 64 76 66 88 100 100 100 125 125 100 100 108 80 120 80 114 120 130 120 130 130 135 132 164 200 200 200 250 250
RECOVERY TIME(s) 30 20 18 20 20 25 20 23 20 25 20 25 22 20 30 25 30 30 20 25
LOAD STEP (A/s) 7.5 7.5 7.5 7.5 7.5 7.5 7.5 7.5 7.5 7.5 7.5 7.5 7.5 7.5 7.5 7.5 7.5 7.5 7.5 7.5
RFB (k) 90.9 90.9 90.9 60.4 60.4 60.4 60.4 40.2 40.2 40.2 40.2 30.1 30.1 30.1 19.1 19.1 13.3 13.3 8.25 8.25
FREQ. (kHz) 400 400 400 400 400 400 400 400 400 400 400 400 400 400 500 500 600 600 700 700
** Bulk capacitance is optional if VIN has very low input impedance.
HEAT SINK MANUFACTURER Wakefield Engineering AAVID Thermalloy
PART NUMBER LTN20069 375424B00034G
WEBSITE www.wakefield.com www.aavidthermalloy.com
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LTM4627 APPLICATIONS INFORMATION
Safety Considerations The LTM4627 modules do not provide isolation from VIN to VOUT. There is no internal fuse. If required, a slow blow fuse with a rating twice the maximum input current needs to be provided to protect each unit from catastrophic failure. The device does support overvoltage protection and overcurrent protection. Layout Checklist/Example The high integration of the LTM4627 makes the PCB board layout very simple and easy. However, to optimize its electrical and thermal performance, some layout considerations are still necessary. * Use large PCB copper areas for high current paths, including VIN, GND and VOUT. It helps to minimize the PCB conduction loss and thermal stress. * Place high frequency ceramic input and output capacitors next to the VIN, GND and VOUT pins to minimize high frequency noise.
VIN CIN CIN CONTROL
* Place a dedicated power ground layer underneath the unit. * To minimize the via conduction loss and reduce module thermal stress, use multiple vias for interconnection between top layer and other power layers. * Do not put vias directly on the pad, unless they are capped or plated over. * Place test points on signal pins for testing. * Use a separated SGND ground copper area for components connected to signal pins. Connect the SGND to GND underneath the unit. * For parallel modules, tie the COMP and VFB pins together. Use an internal layer to closely connect these pins together. Figure 17 gives a good example of the recommended layout.
CONTROL
GND
SIGNAL GROUND
CONTROL
COUT VOUT
COUT VOUT
4627 F17
Figure 17. Recommended PCB Layout
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LTM4627 TYPICAL APPLICATIONS
VIN 4.5V TO 20V C3 22F 25V C2 22F 25V R1 10k CCOMP 150pF C7 0.1F VIN COMP TRACK/SS RUN fSET R3 120k CONTINUOUS MODE MODE_PLLIN SGND GND LTM4627 EXTVCC INTVCC PGOOD VOUT VOUT_LCL DIFF_OUT VOSNS+ VOSNS- VFB RFB 40.2k
4627 TA02
C1 22F 25V
+
CFF 82pF
COUT1 470F 6.3V 2
COUT2* 100F 6.3V
VOUT 1.5V 15A
*SEE TABLE 4
Figure 18. 4.5V to 20VIN, 1.5V at 15A Design
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LTM4627
TYPICAL APPLICATIONS
24
VIN 7V TO 16V INTVCC C7 22F 16V R2 10k COMP TRACK/SS RUN fSET CLOCK SYNC 0 PHASE MODE_PLLIN 100k SGND GND VFB RFB1 45.3k VOSNS- VOSNS+ LTM4627 DIFF_OUT 150pF VOUT_LCL VOUT C9 22F 16V C13 0.1F VIN EXTVCC INTVCC PGOOD C10 22F 16V 1V AT 30A
+
INTVCC
C8 470F 6.3V
C11 100F 6.3V
C14 1F
V+
OUT1
R1 200k
LTC6908-1 OUT2 GND
SET 270pF
MOD
C3 22F 16V VIN COMP TRACK/SS RUN CLOCK SYNC 180 PHASE 100k fSET MODE_PLLIN SGND GND LTM4627 C1 22F 16V
C2 22F 16V
EXTVCC INTVCC PGOOD VOUT VOUT_LCL DIFF_OUT VOSNS+ VOSNS- VFB INTVCC
+
C4 470F 6.3V
C6 100F 6.3V
4627 TA03
Figure 19. 1V at 30A, Two Parallel Outputs with 2-Phase Operation
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LTM4627 TYPICAL APPLICATIONS
VIN 7V TO 16V C22 22F 16V C28 0.1F INTVCC VIN COMP TRACK/SS RUN fSET MODE_PLLIN 100k INTVCC 4-PHASE CLOCK V C2 1F
+
VOUT 1.2V AT 60A
R1 10k
C20 22F 16V
EXTVCC INTVCC PGOOD VOUT LTM4627 VOUT_LCL DIFF_OUT VOSNS+ VOSNS- GND VFB RFB2 15k 270pF
+
C21 470F 6.3V
C24 100F 6.3V
SGND
R2 100k
SET
150pF
LTC6902 MOD DIV PH OUT1 OUT2 GND OUT4 OUT3 C14 22F 16V C18 22F 16V VIN COMP TRACK/SS RUN fSET MODE_PLLIN 100k SGND GND LTM4627 EXTVCC INTVCC PGOOD VOUT VOUT_LCL DIFF_OUT VOSNS+ VOSNS- VFB INTVCC
+
C15 470F 6.3V
C18 100F 6.3V
C7 22F 16V
C9 22F 16V
VIN EXTVCC INTVCC PGOOD COMP TRACK/SS RUN fSET MODE_PLLIN 100k SGND GND LTM4627 VOUT VOUT_LCL DIFF_OUT VOSNS+ VOSNS- VFB INTVCC
+
C8 470F 6.3V
C11 100F 6.3V
150pF
C3 22F 16V
C1 22F 16V
VIN EXTVCC INTVCC PGOOD COMP TRACK/SS RUN fSET MODE_PLLIN 100k SGND GND LTM4627 VOUT VOUT_LCL DIFF_OUT VOSNS+ VOSNS- VFB INTVCC
+
C4 470F 6.3V
C6 100F 6.3V
4627 TA04
Figure 20. 1.2V, 60A, Current Sharing with 4-Phase Operation
4627f
25
LTM4627 PACKAGE DESCRIPTION
Pin Assignment Table (Arranged by Pin Number)
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 PIN NAME VIN VIN VIN VIN VIN VIN INTVCC MODE_PLLIN TRACK/SS RUN COMP MTP1 PIN NAME GND GND GND GND GND GND GND GND GND SGND PGOOD B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 PIN NAME VIN VIN VIN VIN VIN VIN GND GND MTP2 fSET PIN NAME GND GND GND GND GND GND GND GND GND SGND SGND PIN NAME C1 VIN C2 VIN C3 VIN C4 VIN C5 VIN C6 VIN C7 GND C8 C9 GND C10 MTP3 C11 MTP4 C12 MTP5 PIN NAME J1 VOUT J2 VOUT J3 VOUT J4 VOUT J5 VOUT J6 VOUT J7 VOUT J8 VOUT J9 VOUT J10 VOUT J11 J12 VOSNS+ PIN NAME D1 GND D2 GND D3 GND D4 GND D5 GND D6 GND D7 D8 GND D9 INTVCC D10 MTP6 D11 MTP7 D12 MTP8 PIN NAME K1 VOUT K2 VOUT K3 VOUT K4 VOUT K5 VOUT K6 VOUT K7 VOUT K8 VOUT K9 VOUT K10 VOUT K11 VOUT K12 DIFF_OUT PIN NAME E1 GND E2 GND E3 GND E4 GND E5 GND E6 GND E7 GND E8 E9 GND E10 E11 E12 EXTVCC PIN NAME L1 VOUT L2 VOUT L3 VOUT L4 VOUT L5 VOUT L6 VOUT L7 VOUT L8 VOUT L9 VOUT L10 VOUT L11 VOUT L12 VOUT_LCL PIN NAME F1 GND F2 GND F3 GND F4 GND F5 GND F6 GND F7 GND F8 GND F9 GND F10 F11 PGOOD F12 VFB PIN NAME M1 VOUT M2 VOUT M3 VOUT M4 VOUT M5 VOUT M6 VOUT M7 VOUT M8 VOUT M9 VOUT M10 VOUT M11 VOUT M12 VOSNS-
G1 G2 G3 G4 G5 G6 G7 G8 G9 G10 G11 G12
H1 H2 H3 H4 H5 H6 H7 H8 H9 H10 H11 H12
PACKAGE PHOTO
4627f
26
LGA Package 133-Lead (15mm x 15mm x 4.32mm)
(Reference LTC DWG # 05-08-1777 Rev O)
DETAIL A 15 BSC X Y 12 11 10 9 8 15 BSC MOLD CAP SUBSTRATE 13.97 BSC 7 6 5 4 3 2 1 PADS SEE NOTES 3 0.630 1.9050 3.1750 4.4450 5.7150 6.9850 0.630 0.025 SQ. 133x eee S X Y DETAIL B M L K J H G F E D C B A C(0.30) PAD 1 4.22 - 4.42 13.97 BSC 0.12 - 0.28
PACKAGE DESCRIPTION
aaa Z
0.27 - 0.37 3.95 - 4.05 DETAIL B bbb Z Z
PAD 1 CORNER
1.27 BSC
4
aaa Z
PACKAGE TOP VIEW
PACKAGE BOTTOM VIEW
6.9850
5.7150
4.4450
3.1750
1.9050
6.9850
5.7150 0.630 DETAIL A
4.4450
3.1750
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994 2. ALL DIMENSIONS ARE IN MILLIMETERS 3 4 LAND DESIGNATION PER JESD MO-222, SPP-010
LTMXXXXXX Module
COMPONENT PIN "A1"
1.9050
0.6350 0.0000 0.6350
1.9050
3.1750
4.4450
0.6350 0.0000 0.6350
DETAILS OF PAD #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE PAD #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE
5.7150
5. PRIMARY DATUM -Z- IS SEATING PLANE 6. THE TOTAL NUMBER OF PADS: 133 SYMBOL TOLERANCE 0.15 aaa bbb 0.10 eee 0.05
TRAY PIN 1 BEVEL PACKAGE IN TRAY LOADING ORIENTATION
LGA 133 1008 REV O
6.9850
SUGGESTED PCB LAYOUT TOP VIEW
LTM4627
27
4627f
LTM4627 TYPICAL APPLICATION
3.3V at 10A Design
5V C3 22F 16V C2 22F 16V R1 10k VIN COMP TRACK/SS RUN fSET R3 174k CONTINUOUS MODE MODE_PLLIN SGND GND LTM4627 EXTVCC INTVCC PGOOD VOUT VOUT_LCL DIFF_OUT VOSNS+ VOSNS- VFB RFB 13.3k C5 47pF
4627 TA05
C1 22F 16V
C7 0.1F
C4 100F X5R 82pF 5V
C6 100F X5R 6.3V
VOUT 3.3V 10A
RELATED PARTS
PART NUMBER LTM4600 LTM4601A LTM4602 LTM4603 LTM4604A LTM4605 LTM4606 LTM4607 LTM4608A LTM4609 LTM4612 LTM8023 LTM8032 DESCRIPTION 10A DC/DC Module Regulator 12A DC/DC Module Regulator with PLL, Output Tracking/ Margining and Remote Sensing 6A DC/DC Module Regulator 6A DC/DC Module Regulator with PLL and Output Tracking/Margining and Remote Sensing 4A Low Voltage DC/DC Module Regulator Buck-Boost DC/DC Module Family Ultralow Noise 6A DC/DC Module Regulator Buck-Boost DC/DC Module Family 8A Low Voltage DC/DC Module Regulator Buck-Boost DC/DC Module Family Ultralow Noise High VOUT DC/DC Module Regulator 36V, 2A DC/DC Module Regulator Ultralow Noise 36V, 2A DC/DC Module Regulator COMMENTS Basic 10A DC/DC Module Synchronizable, PolyPhase Operation to 48A, Pin Compatible with the LTM4627 Pin Compatible with the LTM4600 Synchronizable, PolyPhase Operation, LTM4603-1 Version Has No Remote Sensing, Pin Compatible with the LTM4601 2.375V VIN 5.5V; 0.8V VOUT 5V, 9mm x 15mm x 2.3mm (Ultrathin) LGA Package All Pin Compatible; Up to 5A; Up to 36VIN, 34VOUT 15mm x 15mm x 2.8mm 4.5V VIN 28V, 0.6V VOUT 5V, 15mm x 15mm x 2.8mm Package All Pin Compatible; Up to 5A; Up to 36VIN, 34VOUT 15mm x 15mm x 2.8mm 2.7V VIN 5.5V; 0.6V VOUT 5V; 9mm x 15mm x 2.8mm LGA Package All Pin Compatible; Up to 5A; Up to 36VIN, 34VOUT 15mm x 15mm x 2.8mm 5A, 5V VIN 36V, 3.3V VOUT 15V, 15mm x 15mm x 2.8mm Package 3.6V VIN 36V, 0.8V VOUT 10V, 9mm x 11.75mm x 2.8mm Package EN55022 Class B Compliant; 0.8V VOUT 10V; 3.6V VIN 36V; 9mm x 15mm x 2.8mm
4627f
28 Linear Technology Corporation
(408) 432-1900
LT 0810 * PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
FAX: (408) 434-0507 www.linear.com
(c) LINEAR TECHNOLOGY CORPORATION 2010

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